Gerbang Logika

Posted by: meme on: September 28, 2007

• In: Kuliah
• 3 Comments

AND gate

If all inputs are high, the output is high. Otherwise, the output is low.
AND gate truth table:

A | B | Y
—————–
0 | 0 | 0
0 | 1 | 0
1 | 0 | 0
1 | 1 | 1

NAND Gate

NAND Gate Theory

The NAND gate can be thought of as an AND gate, followed by a stage of inversion (a NOT gate is such an inverter). The NAND gate can also be created by inverting the two inputs of the OR gate. Either method results in the same truth table.
If NAND gate inputs are inverted, the truth table for the resulting logical function becomes that of the OR gate. The NOR gate with inverted inputs becomes an AND function. Logic circuits can be built with fewer chips using these techniques.

If one or more inputs is low, the output is high. If all inputs are high, the output is low.
NAND gate truth table:

A | B | Y
—————–
0 | 0 | 1
0 | 1 | 1
1 | 0 | 1
1 | 1 | 0

NOR Gate

NOR Gate Theory

The NOR gate can be considered to be an OR gate, followed by a stage of inversion (the NOT gate is such an inversion stage). The NOR gate can also be created by inverting the inputs to the AND gate. Either method results in the same truth table.
If inputs to the NOR gate are inverted, the truth table becomes that of the AND gate. A NAND gate with inverted inputs becomes an OR gate. Logic circuits can be built with fewer chips using these techniques.

If all inputs are low, the output is high. Otherwise the output is low.
NOR gate truth table:

A | B | Y
—————–
0 | 0 | 1
0 | 1 | 0
1 | 0 | 0
1 | 1 | 0

If the input is high, the output is low. If the input is low, the output is high.
NOT gate truth table:

A | Y
———–
0 | 1
1 | 0

In addition to the obvious use this stage has for logic inversion, it is often used to construct more complex logic gates. For example, the AND gate followed by a NOT gate becomes the NAND gate. The OR followed by a NOT gate becomes a NOR gate.
Two NOT gates connected in series (one driving the other) become a non-inverting buffer stage, with high input impedance and low output impedance. In designing practical circuits, this can be useful for increasing the fanout (gate driving range) of a logic circuit, where circuit loading may be encountered.

OR Gate

If one or more inputs is high, the output is high. If all inputs are low, the output is low.
OR gate truth table:

A | B | Y
—————–
0 | 0 | 0
0 | 1 | 1
1 | 0 | 1
1 | 1 | 1

XNOR Gate

If an even number of inputs is high, the output is high. If an odd number of inputs is high, the output is low.
XNOR gate truth table:

A | B | Y
—————–
0 | 0 | 1
0 | 1 | 0
1 | 0 | 0
1 | 1 | 1

XOR Gate

If an odd number of inputs is high, the output is high. Otherwise, the output is low.
XOR gate truth table:

A | B | Y
—————–
0 | 0 | 0
0 | 1 | 1
1 | 0 | 1
1 | 1 | 0

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